Gate driving circuit and array substrate using the same
US10297216B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 12, 2016 |
| Grant date | May 21, 2019 |
| Priority date | — |
| Expiry date | Oct 29, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0235
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate driving circuit and an array substrate using the same are described. The gate driving circuit pulls up and pulls down the voltage level of the node in one display frame by a first voltage signal of a second driving module and a second voltage signal of a third driving module to control the high level and low level respectively of scan signal in the scan output terminal for sequentially writing data signal to all the first row sub-pixels, all the second row sub-pixels and all the third row sub-pixels of the one display frame in order to prevent the sub-pixels from RC delay and color deviation, thereby improving the display quality of the LCD.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.