Semiconductor wafer dicing method
US10297500B2 · kind B2 · utility
0Cited by
6References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 15, 2016 |
| Grant date | May 21, 2019 |
| Priority date | — |
| Expiry date | Dec 15, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3043
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of dicing a bowed or warped semiconductor wafer includes cutting along the saw streets in a first direction on a first half of the wafer, where the first direction is parallel to the bowing, cutting along the saw streets in the first direction on a second half of the wafer opposite to the first half, and step-cutting along the saw streets in the second direction, such that all of the dies are separated from each other, and the sides of the die in the bowing direction are flat and the sides of the die perpendicular to the bowing direction are stepped.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.