Fin-FET device and fabrication method thereof

US10297511B2 · kind B2 · utility

Assignees

• Semiconductor Manufacturing International (Shanghai) Corporation · CN
• Semiconductor Manufacturing International (Beijing) Corporation · CN

Inventor

• Yong Li · Chaole, CN

Key dates

• Filing date: Oct 16, 2017
• Grant date: May 21, 2019
• Expiry date: Oct 21, 2037

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/853
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method for fabricating a Fin-FET device includes forming fin structures on a substrate and an isolation structure to cover a portion of sidewall surfaces of the fin structures, forming gate structures to cover a portion of sidewall and top surfaces of the fin structures, forming doped source/drain regions in the fin structures, forming a metal layer on the doped source/drain regions and the gate structures, performing a reaction annealing process to convert the metal layer formed on the doped source/drain regions into a metal contact layer and then removing the unreacted metal layer, forming a dielectric layer on the metal contact layer and the gate structures with a top surface higher than the top surfaces of the gate structures, forming a plurality of vias through the dielectric layer above the metal contact layer, and forming a plurality of conductive plugs by filling the vias.