BiCMOS integration using a shared SiGe layer
US10297591B2 · kind B2 · utility
1Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 17, 2015 |
| Grant date | May 21, 2019 |
| Priority date | — |
| Expiry date | May 14, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
A bipolar complementary-metal-oxide-semiconductor (BiCMOS) device is disclosed. The BiCMOS device includes a CMOS device in a CMOS region, a PNP bipolar device in a bipolar region, and an NPN bipolar device in the bipolar region. The BiCMOS device includes also includes a silicon-germanium (SiGe) layer over a base of the PNP bipolar device and over a selectively implanted collector of the NPN bipolar device, wherein a first portion of the SiGe layer forms a base of the NPN bipolar device, and a second portion of the SiGe layer forms an emitter of the PNP bipolar device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.