Dynamic processor frequency selection
US10303482B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 7, 2017 |
| Grant date | May 28, 2019 |
| Priority date | — |
| Expiry date | Apr 19, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dynamic processor frequency selection system includes a memory and a processor in communication with the memory. The processor includes a dynamic processor frequency selection module, a branch predictor module, a measurement module, and a power module. The measurement module measures a value according to a looping prediction function, which represents a quantity of cycles spent waiting for a type of contended resource within an instruction sequence. Additionally, the processor retains the value and branch history information, which is used to predict a waiting period associated with a potential loop. Then, the dynamic processor frequency selection module predicts the potential loop in a subsequent instruction according to the type of contended resource. The power module dynamically reduces a processor frequency during the waiting period from a first frequency state to a second frequency state according to the potential loop prediction. Then, the processor resumes operation at the first frequency state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.