Hybrid integration of photodetector array with digital front end
US10304987B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 7, 2018 |
| Grant date | May 28, 2019 |
| Priority date | — |
| Expiry date | May 7, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/811
Abstract
The present disclosure relates to optical receiver systems. An example optical receiver system includes a first substrate with a plurality of photodetectors and a bias circuit. The bias circuit is electrically coupled to each photodetector of the plurality of photodetectors. The bias circuit is configured to provide a bias voltage to each photodetector. The optical receiver system also includes a plurality of capacitors. Each capacitor of the plurality of capacitors is electrically-coupled to a respective photodetector of the plurality of photodetectors. The optical receiver system also includes a second substrate with a read-out circuit having a plurality of channels. Each channel of the plurality of channels is capacitively-coupled to a respective photodetector via the respective capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.