Method for improving spurious free dynamic range (SFDR) and signal-to-noise-and-distortion ratio (SNDR) of capacitor-resistor combined successive approximation register (SAR) analog-to-digital converter (ADC) by capacitor re-configuration
US10305501B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2017 |
| Grant date | May 28, 2019 |
| Priority date | — |
| Expiry date | Aug 1, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/468
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method for improving a spurious free dynamic range and a signal-to-noise-and-distortion ratio of a capacitor-resistor combined successive approximation register analog-to-digital converter by capacitor re-configuration, the method including: 1) arranging 128 unit capacitors in a positive array and a negative array, respectively, dividing unit capacitors of symmetrical positions of the positive array and the negative array into groups to yield a total of 128 groups of capacitors; 2) acquiring 128 digital codes corresponding to 128 groups of capacitors; 3) sorting the 128 groups of capacitors from maximum to minimum according to the 128 digital codes obtained in 2), and recording the 128 groups of capacitors after sorting as C1-C128; and 4) selecting 64 groups of capacitors from C33 to C96, and reconfiguring the 64 groups of capacitors in capacitor arrays of the capacitor-resistor analog-to-digital converter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.