Low-dropout regulator with load-adaptive frequency compensation
US10310530B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 26, 2018 |
| Grant date | Jun 4, 2019 |
| Priority date | — |
| Expiry date | Apr 26, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/59
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A circuit comprises: a pass transistor; a first transistor comprising a gate coupled to the gate of the pass transistor, a source coupled to the source of the pass transistor, and a drain; a second transistor comprising a gate coupled to the gate of the pass transistor, a source coupled to the source of the pass transistor, and a drain; a first current mirror coupled to the drain of the first transistor; a second current mirror coupled to the drain of the second transistor, and coupled to the first current mirror; a feedback voltage circuit coupled to the drain of the pass transistor; an error amplifier comprising a first input port coupled to the feedback voltage circuit, and an output port coupled to the gate of the pass transistor; and a capacitor coupled to the second current mirror and to the first input port of the error amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.