High-speed inter-processor communications
US10311013B2 · kind B2 · utility
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10References
16Claims
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Key dates
| Filing date | Jul 14, 2017 |
| Grant date | Jun 4, 2019 |
| Priority date | — |
| Expiry date | Jul 14, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/173
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computing device has a motherboard, at least two daughter boards communicably connected to the motherboard, each of the at least two daughter boards having at least a specialized processor and a high-speed inter-processor communications port; and at least two high-speed inter-processor communication interconnects connecting at least two of the high-speed inter-processor communications ports. The configuration enables a flexible topology architecture, e.g., for different applications, and rapid reuse of system components even when new specialized processors become available.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.