Efficient reduction of resources for the simulation of Fermionic Hamiltonians on quantum hardware
US10311370B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 21, 2017 |
| Grant date | Jun 4, 2019 |
| Priority date | — |
| Expiry date | Jul 16, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N10/60
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A technique relates to reducing qubits required on a quantum computer. A Fermionic system is characterized in terms of a Hamiltonian. The Fermionic system includes Fermions and Fermionic modes with a total number of 2M Fermionic modes. The Hamiltonian has a parity symmetry encoded by spin up and spin down parity operators. Fermionic modes are sorted such that the first half of 2M modes corresponds to spin up and the second half of 2M modes corresponds to spin down. The Hamiltonian and the parity operators are transformed utilizing a Fermion to qubit mapping that transforms parity operators to a first single qubit Pauli operator on a qubit M and a second single qubit Pauli operator on a qubit 2M. The qubit M having been operated on by the first single qubit Pauli operator and the qubit 2M having been operated on by the second single qubit Pauli operator are removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.