Semiconductor device having a surface insulator layer and manufacturing method therefor
US10312093B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 22, 2017 |
| Grant date | Jun 4, 2019 |
| Priority date | — |
| Expiry date | Nov 22, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/451
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to the technical field of semiconductors, and discloses a semiconductor device and a manufacturing method therefor. The manufacturing method includes: providing a semiconductor structure, where the semiconductor structure includes an active region and a gate structure located in the active region, the gate structure at least including a gate electrode, and the active region exposing an upper surface of the gate electrode; forming a surface insulator layer on the upper surface of the gate electrode; forming a patterned interlayer dielectric layer on the semiconductor structure, where the interlayer dielectric layer covers the surface insulator layer, and has a first through hole exposing a portion of the active region; and forming a conductive contact layer passing through the first through hole and contacting with the active region. The present disclosure may reduce a leakage current which is possibly generated between the conductive contact layer and the gate electrode, so as to improve the performance of the device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.