Field-effect transistor (FET) having oxide insulating layer disposed on gate insulating film and between source and drain electrodes, and display element, display and system including said FET, and method of manufacturing said FET
US10312373B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 11, 2016 |
| Grant date | Jun 4, 2019 |
| Priority date | — |
| Expiry date | Feb 16, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/1213
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A field-effect transistor includes a gate electrode, a source electrode and a drain electrode to take out electric current according to an application of a voltage to the gate electrode, a semiconductor layer disposed adjacent to the source electrode and the drain electrode, the semiconductor layer forming a channel between the source electrode and the drain electrode, a first insulating layer as gate insulating film disposed between the semiconductor layer and the gate electrode, and a second insulating layer covering at least a part of a surface of the semiconductor layer, the second insulating layer including an oxide including silicon and alkaline earth metal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.