Patent · US Active

Clock synchronizing

US10313098B2 · kind B2 · utility

1Cited by
1References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 31, 2017
Grant dateJun 4, 2019
Priority date
Expiry dateOct 31, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L67/12
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

Methods, systems, and machine-readable storage mediums for clock synchronizing among detectors in a clock synchronizing configuration are provided. An example clock synchronizing method includes: providing a clock of a preset frequency in each of N modules to be synchronized, coupling every two adjacent modules of the modules by a transmission line of the same length, N being an odd number, selecting two different modules from the modules as two reference modules respectively, controlling each of the reference modules to transmit a synchronizing signal to the other modules, determining a clock error between every two modules having the same transmission distance from the reference module according to a moment of the synchronizing signal reaching each of the other modules, selecting a calibrating module from the modules, and implementing clock synchronization between each of the modules and the calibrating module according to the respective clock errors associated with the two reference modules.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.