Hardware instruction set to replace a plurality of atomic operations with a single atomic operation
US10318292B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 17, 2014 |
| Grant date | Jun 11, 2019 |
| Priority date | — |
| Expiry date | Apr 20, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3017
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods may process a single atomic operation. An instruction set may be generated to replace a plurality of atomic operations with a single atomic operation. The instruction set may include an accumulation instruction to compute a prefix sum for a plurality of initial values associated with a plurality of processing lanes to generate a plurality of accumulated values. The instruction set may also include a broadcast instruction to return a pre-existing value to be added with each of the plurality of accumulated values to generate a plurality of intermediate accumulated values. In one example, a graphics processor may execute the instruction set to process the single atomic operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.