Method and system for implementing a non-volatile counter using non-volatile memory
US10318416B2 · kind B2 · utility
3Cited by
5References
13Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 18, 2017 |
| Grant date | Jun 11, 2019 |
| Priority date | — |
| Expiry date | Jun 25, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/72
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for implementing a non-volatile counter using non-volatile memory is disclosed. In an embodiment, the method involves distributing operations for storing a low word of a counter in non-volatile memory across memory cells in a memory array in the non-volatile memory, and storing additional bits of the counter in the non-volatile memory in memory cells outside of the memory array, wherein the location in the memory array at which the low word is stored is determined for each count based on the upper bits of the counter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.