Variable equivalency on connection in a process simulation
US10318665B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 15, 2014 |
| Grant date | Jun 11, 2019 |
| Priority date | — |
| Expiry date | Jun 23, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05B19/00
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A system for developing a simulation of a process. In one aspect, a system creates a first model within the simulation. The first model represents a part of the process and comprises a first port to which other models may be connected. The system also creates a second model within the simulation. The second model represents another part of the process and comprises a second port to which other models may be connected. The system then connects the first port and the second port together. Upon connection, the system allocates a memory location as a connection variable that represents a type of information transfer between the first and second ports. A first port variable, which represents a value transferable through the first port, is set to reference the value at the allocated memory location. Similarly, a second port variable, which represents a value transferable through the second port, is also set to reference the value at the allocated memory location.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.