Resistive processing unit weight reading via collection of differential current from first and second memory elements
US10319439B1 · kind B1 · utility
6Cited by
4References
20Claims
0Family size
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Key dates
| Filing date | May 15, 2018 |
| Grant date | Jun 11, 2019 |
| Priority date | — |
| Expiry date | May 15, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2013/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A resistive processing unit includes a first analog memory element, a second analog memory element connected in series with the first analog memory element, and a control circuit coupled to the first analog memory element and the second analog memory element. The control circuit is configured to read a synaptic weight value of the resistive processing unit by collecting a differential current from the first analog memory element and the second analog memory element on at least one of a read column line and a read row line coupled to a terminal coupling the first analog memory element and the second analog memory element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.