Insulated gate bipolar transistor and fabrication method thereof
US10319845B2 · kind B2 · utility
Assignees
Inventor
Key dates
| Filing date | Jan 18, 2018 |
| Grant date | Jun 11, 2019 |
| Priority date | — |
| Expiry date | Jan 24, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/127
Abstract
An insulated gate bipolar transistor and a method for fabricating the insulated gate bipolar transistor are provided. The insulated gate bipolar transistor includes a semiconductor layer including a bulk layer and a cell region including a first region and a second region. The insulated gate bipolar transistor also includes a well region, a drift region, and a plurality of gate structures in the bulk layer associated with the cell region. Further, the insulated gate bipolar transistor includes source and drain doped regions and an ohmic contact region in a top region of the well region. A size of the source and drain doped regions in the second region is smaller than a size of the source and drain doped regions in the first region. A size of the ohmic contact region in the second region is larger than a size of the ohmic contact region in the first region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.