Method of testing the resistance of a circuit to a side channel analysis of second order or more
US10320555B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 2017 |
| Grant date | Jun 11, 2019 |
| Priority date | — |
| Expiry date | Jul 21, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/12
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A test method can include: acquiring a plurality of value sets including measurements or signals corresponding with activity of a circuit when executing a set of cryptographic operations on secret data, for each value set, selecting at least two subsets of values, computing combined values and counting occurrence numbers of values transformed by a first surjective function applied to the combined values, for each operation and each possible value of a part of the secret data, computing a partial operation result, computing cumulative occurrence number sets by adding the occurrence number sets corresponding to the operations of the operation set, which when applied to a same value of the possible values of the part of the secret data, provide a partial operation result having a same transformed value by a second surjective function, and determine the part of the secret data from the cumulative occurrence number sets.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.