Application specific low-power secure key
US10320562B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2016 |
| Grant date | Jun 11, 2019 |
| Priority date | — |
| Expiry date | Feb 23, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L9/0891
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A key generator including a low-power key adjust circuit, and a high-power key adjust circuit. The low-power key adjust circuit including a storage location to store an original key, a shifter to shift the original key by a number of steps to shift to create a first key, and an output to provide the first key. The high-power key adjust circuit including an input coupled to the output of the low-power key adjust circuit to receive the first key, a scrambler to scramble the first key to create a scrambled key, and select circuitry to select either the first key or the scrambled key to output from the high-power key adjust circuit based on a bit in a configuration register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.