Patent · US Active

Input/output fencing optimization

US10320702B2 · kind B2 · utility

2Cited by

14References

15Claims

0Family size

Assignee

Veritas Technologies LLC · US

Inventors

Jai Prakash Gahlot · Pune, IN
Amol Katkar · Jamkhed, IN
Udipta Das · Jamkhed, IN
Pranav Peshwe · Dudhnai, IN

Key dates

Filing date	Sep 30, 2015
Grant date	Jun 11, 2019
Priority date	—
Expiry date	Feb 4, 2036

Classification

Technology area (CPC H)Electricity
CPC primaryH04L67/51
WIPO fieldDigital communication
WIPO sectorElectrical engineering

Abstract

Various systems, methods, and processes to optimize input/output (I/O) fencing operations in systems that implement coordination points are presented. A matrix is generated. The matrix includes information indicating the accessibility of one or more coordination points by a node. The method then transmits the matrix to one or more other nodes.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.