Method for manufacturing an encapsulation cover for an electronic package and electronic package comprising a cover
US10325784B2 · kind B2 · utility
0Cited by
8References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 24, 2017 |
| Grant date | Jun 18, 2019 |
| Priority date | — |
| Expiry date | Aug 24, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/97
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a cover for an electronic package includes placing an insert having opposite faces between opposite faces of a cavity of a mold. A coating material is injected in the mold cavity around the insert. The coating material is then set to form a substrate that is overmolded around the insert and produce the cover.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.