TFT substrate manufacturing method
US10325942B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2016 |
| Grant date | Jun 18, 2019 |
| Priority date | — |
| Expiry date | Mar 17, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D99/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a TFT substrate manufacturing method. The TFT substrate manufacturing method includes: Step 10: applying a first mask-based operation to form a TFT gate electrode pattern on a base plate; Step 20: applying a second mask-based operation to form an active layer pattern and a source/drain metal electrode pattern on the base plate; Step 30: depositing a passivation layer on the base plate, applying a third mask-based operation to define a pixel electrode pattern, conducting etching and photoresist haze operations, and then depositing a pixel electrode; and Step 40: conducting etching or direct photoresist stripping to form the pixel electrode pattern. The TFT substrate manufacturing method according to the present invention provides an effective method of stripping ITO deposited on PR, which is applicable to a three-mask based TFT manufacturing process and could greatly improve manufacturing efficiency and reduce difficulty to thereby effectively enhance capability of the three-mask based manufacturing process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.