Patent · US Active

Protecting transistor elements against degrading species

US10325985B2 · kind B2 · utility

0Cited by
3References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 21, 2015
Grant dateJun 18, 2019
Priority date
Expiry dateAug 9, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10K71/20

Abstract

A technique comprising: providing a stack of layers defining at least (a) source and drain electrodes, (b) gate electrode, and (c) semiconductor channel of at least one transistor; depositing one or more organic insulating layers over the stack; removing at least part of the stack in one or more selected regions by an ablation technique; depositing conductor material over the stack in at least the one or more ablated regions and one or more border regions immediately surrounding a respective ablated region; and depositing inorganic insulating material over the stack at least in the ablated regions and the border regions to cover the ablated regions and make direct contact with said conductor material in said one or more border regions all around the respective ablated region.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.