Multi-layer cooling element
US10327323B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 9, 2015 |
| Grant date | Jun 18, 2019 |
| Priority date | — |
| Expiry date | Sep 9, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/066
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
To provide more space for additional circuit elements (coils, capacitors) and/or to allow the accommodation of additional circuit elements required for shielding the circuits, the metallization regions are arranged one over the other in at least two metallization layers. The carrier body has a surface on which sintered metallization regions are arranged in a first metallization layer, said metallization regions carrying electronic components and/or being structured such that the metallization regions form resistors or coils. The metallization regions are covered, together with the components and/or the resistors or coils, by a ceramic plate, and optionally additional metallization regions are arranged in additional metallization layers on the ceramic plate and each metallization region is covered by a ceramic plate. Sintered metallization regions are arranged in a metallization layer for the purpose of accommodating circuit elements on the uppermost ceramic plate facing away from the cooling elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.