Package substrates and methods of fabricating the same
US10332755B2 · kind B2 · utility
0Cited by
23References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 7, 2016 |
| Grant date | Jun 25, 2019 |
| Priority date | — |
| Expiry date | Oct 14, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/0909
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A package substrate includes a core portion comprising a first surface and a second surface arranged opposite to each other; first cutting regions provided to penetrate at least a portion of the core portion in a thickness direction; a first upper circuit pattern disposed on the first surface of the core portion; and an insulating layer provided to cover the first surface of the core portion and to fill the first cutting regions. The first cutting regions are spaced apart from each other in a first direction that is substantially parallel to one side of the core portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.