Architecture to communicate signals for operating a static random access memory
US10332893B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 25, 2015 |
| Grant date | Jun 25, 2019 |
| Priority date | — |
| Expiry date | Sep 25, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/413
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques and mechanisms for exchanging signals with one or more transistors at a front side of a semiconductor substrate. In an embodiment, an integrated circuit include a cell—such as a static random access memory (SRAM) cell—comprising transistor structures variously disposed in or on a first side of a substrate. After fabrication of such transistor structures, substrate material may be thinned to expose a second side of the substrate, opposite the first side. A first interconnect and a second interconnect are coupled each to exchange a signal or a voltage. In another embodiment, respective portions of the first interconnect and the second interconnect extend on opposite sides of the substrate, wherein the first side and the second side each extend between such interconnect portions. Positioning of interconnect structures on opposite sides of the substrate allow for performance improvements due to low interconnect resistances.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.