Pixel unit and method for producing the same, array substrate and display apparatus
US10332917B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 31, 2015 |
| Grant date | Jun 25, 2019 |
| Priority date | — |
| Expiry date | Oct 27, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/88
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present disclosure provides a pixel unit and a method for producing the same, an array substrate and a display apparatus. The pixel unit includes: a thin film transistor; an insulation layer formed at least on a drain electrode of the thin film transistor and formed therein with a via hole which extends through the insulation layer to expose the drain electrode of the thin film transistor below the insulation layer; a pixel electrode formed on the insulation layer and electrically connected to the drain electrode of the thin film transistor at the via hole; and at least one elevating layer formed below the via hole and located below a part of the drain electrode exposed from the via hole such that the exposed part has a height greater than the height of the parts of the drain electrode adjacent to the exposed part. The depth and slope of the via hole is reduced by adding the elevating layer below the via hole. The elevating layer may be made from the gate metal layer and/or the active layer that are not etched off in process without increasing any production cost and process difficulty.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.