Thin film transistor, manufacturing method for array substrate, array substrate and display device
US10332987B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 20, 2017 |
| Grant date | Jun 25, 2019 |
| Priority date | — |
| Expiry date | Jan 20, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/0231
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A thin film transistor, a manufacturing method for an array substrate, the array substrate, and a display device are provided. The manufacturing method for a thin film transistor includes: forming a semiconductor layer; performing a modification treatment on a surface layer of a region of the semiconductor layer, so that the region of the semiconductor layer has a portion in a first direction perpendicular to the semiconductor layer formed as an etching blocking layer, portions of the semiconductor layer on both sides of the etching blocking layer in a second direction parallel to a surface of the semiconductor layer remaining unmodified; and forming a source electrode and a drain electrode on the semiconductor layer, the source electrode and the drain electrode being formed on both sides of a center line of the region perpendicular to the second direction, and spaced from each other in the second direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.