Advanced fall through mechanism for low power sequencers
US10338655B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 11, 2017 |
| Grant date | Jul 2, 2019 |
| Priority date | — |
| Expiry date | Sep 2, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Aspects of the disclosure are directed to DC power management. A sequencer may be configured to execute a first command, wherein the first command is associated with a unique group tag; compare the unique group tag to a master group tag; determine if an interrupt is detected; lock the master group tag to yield a locked master group tag; execute a second command, wherein the second command is associated with the locked master group tag; determine that an end of commands in the locked master group tag is reached and execute a sequence jump through command to put a processor back to a regular power state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.