Input voltage reduction for processing devices
US10338670B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 10, 2016 |
| Grant date | Jul 2, 2019 |
| Priority date | — |
| Expiry date | Jun 10, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Voltage adjustment techniques for computing systems and processing devices are presented herein. In one example, a method of determining operating voltages for a processing device includes executing a voltage adjustment process to determine at least one input voltage for the processing device lower than a manufacturer specified operating voltage. During the voltage adjustment process, the method includes applying incrementally adjusted input voltages to the processing device, operating the processing device according to a functional test that exercises the processing device in context with associated system elements of a computing assembly, and monitoring for operational failures of at least the processing device during application of each of the incrementally adjusted input voltages. Responsive to the operational failures, the method includes determining corresponding values of the incrementally adjusted input voltages and establishing an input voltage based at least in part on the corresponding values of the incrementally adjusted input voltages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.