Closed-loop testing of integrated circuit card payment terminals
US10339513B1 · kind B1 · utility
8Cited by
13References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2016 |
| Grant date | Jul 2, 2019 |
| Priority date | — |
| Expiry date | Jul 28, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06Q20/40
- WIPO fieldIT methods for management
- WIPO sectorElectrical engineering
Abstract
Technologies for closed-looped testing of integrated circuit card payment terminals include loading a test profile onto an integrated circuit payment card. Authorization request and response messages are locally generated and translated to simulate acquirer processor processing and payment network processing. An outcome report indicative of the outcome of the test transaction is generated and transmitted to a remote certification server. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.