GOA circuit
US10339870B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 30, 2016 |
| Grant date | Jul 2, 2019 |
| Priority date | — |
| Expiry date | Jul 8, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0214
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The invention provides a GOA circuit, comprising a plurality of GOA units, for a positive integer n, n-th GOA unit comprising: a first TFT (T1), a second TFT (T2), a third TFT (T3), a fourth TFT T(4), a fifth TFT (T5), a sixth TFT (T6), a seventh TFT (T7), an eighth TFT (T8), a ninth TFT (T9), a tenth TFT (T10), a first capacitor (C1) and a second capacitor (T2). The invention, based on known GOA circuit, uses T9 and T10 so as to achieve forward and backward scanning without D2U and U2D control signals, which facilitates narrow border design and simplifies corresponding driving timing and reduce IC cost. The pre-charging unit formed by T1, T9, T3, and T10 effectively improves the current leakage and ensures GOA circuit stability.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.