Single-readout high-density memristor crossbar
US10340001B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2016 |
| Grant date | Jul 2, 2019 |
| Priority date | — |
| Expiry date | Aug 23, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/70
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods are provided for mitigating problems caused by sneak-paths current during memory cell access in gateless arrays. Example methods contemplated herein utilize adaptive-threshold readout techniques that utilize the locality and hierarchy properties of the computer memory system to address this sneak-paths problem. The method of the invention is a method for reading a target memory cell located at an intersection of a target row of a gateless array and a target column of the gateless array, the method comprising: —reading a value of the target memory cell; and—calculating an actual value of the target memory cell based on the read value of the memory cell and a component of the read value caused by sneak path current. Utilizing either an “initial bits” strategy or a “dummy bits” strategy in order to calculate the component of the read value caused by sneak path current, example embodiments significantly reduce the number of memory accesses pixel for an array readout. In addition, these strategies consume an order of magnitude less power in comparison to alternative state-of-the-art readout techniques.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.