Phase-locked circuit with automatic calibration function and automatic calibration method thereof
US10340924B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 17, 2018 |
| Grant date | Jul 2, 2019 |
| Priority date | — |
| Expiry date | Sep 17, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital phase-locked loop with an automatic calibration function and an automatic calibration method thereof are provided. The digital phase-locked loop includes a frequency and phase detector, a calibration circuit, a frequency and phase locked circuit, and an oscillator circuit. The frequency and phase locked circuit outputs an initial control signal. The calibration circuit calibrates an initial frequency and outputs an initial calibration signal having a calibrated initial frequency when determining that the initial frequency does not fall within an allowable error calibration range. The frequency and phase locked circuit locks the calibrated initial frequency when determining that the calibrated initial frequency falls within a locked frequency range. The oscillator circuit outputs an oscillator signal according to the initial calibration signal and the initial control signal. Therefore, a resolution of the oscillator circuit can be improved by the automatic calibration of frequency drift caused by processes and environments.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.