Trim digital-to-analog converter (DAC) for an R2R ladder DAC
US10340941B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 7, 2018 |
| Grant date | Jul 2, 2019 |
| Priority date | — |
| Expiry date | Nov 7, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/12
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital-to-analog converter (DAC) includes a first stage comprising a plurality of first circuit arms coupled together, each first circuit arm including a resistor. A second stage includes a plurality of second circuit arms coupled together, each second circuit arm comprising a first resistor and a pair of series-connected resistors. The first resistors of the second circuit arms are connected in series. A current digital-to-analog converter (IDAC) trim circuit is connected to a plurality, but not all, of the second circuit arms of the second stage. The IDAC trim circuit includes a plurality of first current sources. Each first current source is coupled to a respective node between a pair of the series-connected resistors of a corresponding second circuit arm, and each of the first current sources is configured to produce a same current level as the other first current sources.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.