Distributed contiguous reads in a network on a chip architecture
US10346049B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2016 |
| Grant date | Jul 9, 2019 |
| Priority date | — |
| Expiry date | Apr 29, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/9047
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Systems and techniques for network on a chip based computer architectures and distributing data without shared pointers therein are described. A described system includes computing resources; and a memory resource configured to maintain a dedicated memory region of the memory resource for distributed read operations requested by the computing resources. The computing resources can generate a packet to fetch data from the dedicated memory region without using memory addresses of respective data elements. The memory resource can receive the first packet, determine whether the first packet indicates the distributed read operation, and determine that the dedicated memory region is non-empty. Further, the memory resource can fetch one or more data elements from the dedicated memory region based on the first packet indicating the distributed read operation and the dedicated memory region being non-empty, and send a packet that includes the one or more fetched data elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.