Method and device for fail-safe erase of flash memory
US10347349B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 10, 2016 |
| Grant date | Jul 9, 2019 |
| Priority date | — |
| Expiry date | Aug 24, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a flash memory device including a flash memory comprising a plurality of nonvolatile memory cells, divided into a plurality of erase units; a memory section dedicated to storing erase status information, the erase status information indicating an erase status of the plurality of erase units; and a memory controller configured to receive an erase request indicating at least one erase unit; store erase status information for the at least one erase unit in the memory section; perform an erase operation on the at least one erase unit; and update the stored erase status information upon completion of the erase operation. In addition, the present disclosure provides a way how incomplete erase commands can be handled transparently in a fail safe way.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.