Patent · US Active

Variable stealth laser dicing process

US10347534B2 · kind B2 · utility

0Cited by
3References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 12, 2017
Grant dateJul 9, 2019
Priority date
Expiry dateSep 12, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2221/6834
  • WIPO fieldMachine tools
  • WIPO sectorMechanical engineering

Abstract

Embodiments are provided herein for separating integrated circuit (IC) device die of a wafer, the wafer having a front side with an active device region and a back side, the active device region having a plurality of active devices arranged in rows and columns and separated by cutting lanes, the method including: attaching the front side of the wafer onto a first dicing tape; forming a modification zone within each cutting lane through the back side of the wafer, wherein each modification zone has a first thickness near a corner of each active device and a second thickness near a center point of each active device, wherein the second thickness is less than the first thickness; and propagating cracks through each cutting lane to separate the plurality of active devices.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.