Patent · US Active

Semiconductor packaging structure and semiconductor power device thereof

US10347758B2 · kind B2 · utility

0Cited by
1References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 12, 2017
Grant dateJul 9, 2019
Priority date
Expiry dateJul 12, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/256
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor packaging structure includes a chip, a first pin, a second pin, and a third pin. The chip includes a first surface, a second surface, a first power switch, and a second switch, and both the first power switch and the second switch include a first terminal and a second terminal. The second surface of the chip is opposite to the first surface of the chip. The first pin does not contact to the second pin. The first terminal of the first power switch of the chip is coupled to the first pin, and the second terminal of the first power switch of the chip is coupled to the third pin. The first terminal of the second power switch of the chip is coupled to the third pin, and the second terminal of the second power switch of the chip is coupled to the second pin.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.