Digital analog dither adjustment
US10348321B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 2, 2017 |
| Grant date | Jul 9, 2019 |
| Priority date | — |
| Expiry date | Oct 2, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/12
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and system for data conversion includes an analog noise generator to generate a random, non-deterministic, analog noise signal. An adder adds the analog noise signal to an analog RF signal to produce a dithered analog signal. A first quantizer converts the analog noise signal to digital to produce a digital noise signal. A second quantizer converts the dithered analog signal to a digital equivalent signal. A digital dither adjustment module removes amplitude measurements of the digital noise signal from the digital equivalent signal to obtain a linearized digital representation of the analog RF signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.