Patent · US Active

On-chip trimming circuit and method therefor

US10348322B1 · kind B1 · utility

3Cited by
7References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 26, 2018
Grant dateJul 9, 2019
Priority date—
Expiry dateJun 26, 2038

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG05F3/30
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A semiconductor device includes a trimming circuit for a power management circuit. The trimming circuit includes an analog to digital converter (ADC) circuit with a comparator circuit, a successive approximation register (SAR) circuit having an input coupled to an output of the comparator circuit, a control circuit coupled to the SAR circuit, a digital to analog converter (DAC) circuit having inputs selectively couplable to digital output signals of the SAR circuit and an output coupled to a first input of the comparator circuit, and a variable resistance circuit configured to be selectively coupled to output signals of the ADC circuit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.