Carrier frequency offset compensation circuit and process for a communications receiver
US10348539B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 13, 2018 |
| Grant date | Jul 9, 2019 |
| Priority date | — |
| Expiry date | Mar 13, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2027/0026
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A frequency demodulated signal includes a frequency modulation in time that is shifted by a DC level corresponding to a carrier frequency offset. A number of different frequency offsets are applied to the frequency demodulated signal to generate a corresponding number of offset frequency demodulated signals. Each offset frequency demodulated signal is correlated against a reference signal and a determination is made as to which correlation produces a highest correlation value. One offset frequency demodulated signal of the number of offset frequency demodulated signals is then selected for output as an offset corrected frequency demodulated signal. The selected signal is the one having the highest correlation value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.