Solid state switch power emulator
US10352987B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 7, 2017 |
| Grant date | Jul 16, 2019 |
| Priority date | — |
| Expiry date | Aug 23, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31926
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A solid state switch power emulator circuit, the circuit including a high voltage section including a high voltage power supply (HVPS); a high voltage capacitor (HVC) electronically connected to the HVPS in parallel; a high voltage switch (HVS) electronically connected to the HVC and the HVPS in series; and a high voltage load (HVL) electronically connected to the HVS in series; a low voltage section including a low voltage power supply (LVPS); a low voltage capacitor (LVC) electronically connected to the LVPS in parallel; a low voltage switch (LVS) electronically connected to the LVPS and the LVC in series; a low voltage load (LVL) electronically connected to the LVS in series; and a high voltage diode (HVD) electronically connected to the LVL in series, wherein voltage levels associated with the low voltage section are less than voltage levels associated with the high voltage section.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.