Patent · US Active

Low power non-volatile SRAM memory systems

US10353715B2 · kind B2 · utility

1Cited by

6References

16Claims

0Family size

Assignee

Aspiring Sky Co. Limited · CN

Inventors

Zhijiong Luo · Poughkeepsie, US
Xiaoming Jin · Shanghai, CN
Shu Wang · Shakopee, US
Zuqu Li · Shanghai, CN

Key dates

Filing date	Dec 27, 2017
Grant date	Jul 16, 2019
Priority date	—
Expiry date	Dec 27, 2037

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D10/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Memory structures are provided, where a fast SRAM in an mNVSRAM block may serve as the buffer for a large block NVM memory to increase the data exchange rate between computing units or processor cores and the large NVM memory. The mNVSRAM blocks may also provide a fast boot function, where a boot code may be stored in the NVM parts of the mNVSRAM block, and due to the high bandwidth communication between fast SRAM part and the associated NVM memories, the boot code may be transferred into the fast SRAM in one or a few clock cycles enabling fast boot up function. Similarly, code stored in the NVM parts of an mNVSRAM block may be transferred into fast SRAM rapidly at wake-up time enabling fast wake up and voiding a need to wake up any other memory part, which may also result in energy savings for the computing system.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.