Checkpoint based technique for bootstrapping forward map under constrained memory for flash devices
US10353813B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2016 |
| Grant date | Jul 16, 2019 |
| Priority date | — |
| Expiry date | Oct 21, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system comprising a processor and a memory storing instructions that, when executed, cause the system to determine a first value of a first checkpoint associated with a first snapshot, receive a second value of a second checkpoint associated with a translation table entry from an additional source, determine whether the second value of the second checkpoint is after the first value of the first checkpoint, in response to determining that the second value of the second checkpoint is after the first value of the first checkpoint, retrieve the translation table entry associated with the second checkpoint from the additional source, and reconstruct the translation table using the translation table entry associated with the second checkpoint.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.