Less-secure processors, integrated circuits, wireless communications apparatus, methods and processes of making
US10353823B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 18, 2015 |
| Grant date | Jul 16, 2019 |
| Priority date | — |
| Expiry date | Dec 8, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit (122) includes an on-chip boot ROM (132) holding boot code, a non-volatile security identification element (140) having non-volatile information determining a less secure type or more secure type, and a processor (130). The processor (130) is coupled to the on-chip boot ROM (132) and to the non-volatile security identification element (140) to selectively execute boot code depending on the non-volatile information of the non-volatile security identification element (140). Other technology such as processors, methods of operation, processes of manufacture, wireless communications apparatus, and wireless handsets are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.