Mapping application functional blocks to multi-core processors
US10354033B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 21, 2017 |
| Grant date | Jul 16, 2019 |
| Priority date | — |
| Expiry date | Sep 28, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/327
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One embodiment provides a system to identify a “best” usage of a given set of CPU cores to maximize performance of a given application. The given application is parsed into a number of functional blocks, and the system maps the functional blocks to the given set of CPU cores to maximize the performance of the given application. The system determines and then tests various mappings to determine the performance, generally preferring mappings that maximize throughput per physical core. Before testing a mapping, the system determines whether the mapping is redundant with any previously tested mappings. In addition, given a performance target for the given application, the system determines a minimum number of CPU cores needed for the application to meet the application performance target.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.