Semiconductor device and method of manufacturing the semiconductor device
US10355122B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2017 |
| Grant date | Jul 16, 2019 |
| Priority date | — |
| Expiry date | Jun 30, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/159
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Properties of a semiconductor device are improved. A semiconductor device having a superjunction structure, in which p-type column regions and n-type column regions are periodically arranged, is configured as follows. Each n-type column region has a vertical section including an n-type epitaxial layer located between trenches and a tapered embedded n-type epitaxial film disposed on a side face of the trench. Each p-type column region includes an embedded p-type epitaxial film disposed within the trench. The tapered embedded n-type epitaxial film is thus provided on the sidewall of the trench in which the p-type column region is to be disposed, thereby the p-type column region is allowed to have an inverted trapezoidal shape, leading to an increase in margin for a variation in concentration of a p-type impurity in the p-type column region. On resistance can be reduced by lateral diffusion of an n-type impurity (for example, As).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.