Circuits for three-level buck regulators
US10355593B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 11, 2018 |
| Grant date | Jul 16, 2019 |
| Priority date | — |
| Expiry date | Jan 11, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/07
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An inductor; a first switch having a first side connected to a first voltage source (VS1); a second switch having a first side connected to a second side of the first switch (2SS1), and a second side connected to a first side of the inductor (1SI); a third switch having a first side connected to the 1SI; a fourth switch having a first side connected to a second side of the third switch (2SS3), and a second side connected to a second voltage source (VS2); a fifth switch having a first side connected to the 1SI, and a second side connected to the VS1 and/or the VS2; a first capacitor having a first side connected to the 2SS1, and a second side connected to the 2SS3; and a second capacitor having a first side connected to a second side of the inductor, and a second side connected to the VS2.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.